Currently, a high speed serial bus transmission architecture including such as an universal serial bus (USB) or an IEEE1394 interface is frequently used to be connected to an external peripheral apparatus. In an exemplar of a USB interface data transmission architecture, a common host utilizes a USB control chip to offer an USB port with a capability of simultaneously connecting with various peripheral apparatus, such as a keyboard, a mouse, a joystick, a card reader, a flash disk, a digital camera or a scanner etc., so as to simplify the connections among the peripheral apparatus and the host. Optimally, the USB interface can support the most amounts of up to 127 peripheral apparatus, and support a plug-and-play function which can perform a hot plugging and detect a newly-added hardware even when the power supply is powered on. Currently, the standard specification of the USB is developed to 2.0 version, which can operate in a data transmission speed of up to 480 Mbps. According to the requirement of the USB specification, the micro-frame timer range needs to be a high speed bits range from 59904 bits to 60096 bits so as to greatly raise bandwidth sufficient for accommodating more data transmission packets.
Referring to FIG. 1, a conventional USB interface data transmission architecture is shown, which includes a USB host 10 and a USB device 12 connected with each other via USB interfaces and transmitting USB signal therebetween. Since the resolution of the signal transmission frequency on the demand of the USB interfaces is very high, a USB control chip of the USB device 12 needs to employ an external crystal oscillator 14 for generating a clock frequency to be a working frequency thereof. However, the usage of the external crystal oscillator 14 costs higher, and may invoke occurrence of a frequency error problem in the working frequency in comparison with the USB signal transmitted from the USB host 10.
Furthermore referring to FIG. 2, which shows another conventional USB interface data transmission architecture disclosed in TW Patent Pub. No. 200719154 (as thereafter referred to Patent Pub. No. '154) including a USB host 20 and a USB device 22 connected with each other for transmitting USB signal therebetween. As shown in FIG. 2 of Patent Pub. No. '154, the USB device needs to additionally employ a frequency signal source 24 (referring to a reference clock generating circuit 132 disclosed in FIG. 7 of Patent Pub. No. '154) to provide a reference clock signal according to a corrected output signal. Then, a frequency synthesizer (as referring to a phase-locked loop 134 disclosed in FIG. 7 of Patent Pub. No. '154) is used to calibrate a working frequency according to the reference clock signal. However, such a conventional circuit design becomes highly complicated and costs higher. For USB transmission signal, the working frequency calibrated by the frequency signal source generated from the reference clock generating circuit still has the inaccurate frequency resolution problem.